Overview
The Honeywell 200 was a character-oriented two-address commercial computer introduced by Honeywell in December 1963, the basis of later models in Honeywell 200 Series, including 1200, 1250, 2200, 3200, 4200 and others, and the character processor of the Honeywell 8200 (1968).
Introduced to compete with IBM's 1401, the H200 was two or three times faster and, with software support, most of the time could execute IBM 1401 programs without need for their recompilation or reassembly. The Liberator marketing campaign exploited this compatibility, and was credited in later Honeywell publicity statements with stalling the sales of IBM 1401 machines. Honeywell claimed an initial rush of hundreds of orders for the H200 that itself stalled when IBM countered with a marketing emphasis on their System 360 product range that was then under development.
Architecture
As designed by Director of Engineering William L. Gordon, the H200 memory consisted of individually addressed characters, each composed of six data bits, two punctuation bits and a parity bit. The two punctuation bits recorded a word mark and an item mark, while both being set constituted a record mark. The item bit permitted item moves and record moves in addition to word moves (move successive characters one-by-one starting at the addresses given in the instruction, stopping when the relevant punctuation mark was found set in either field).
An instruction consisted of a one-character op-code, up to two operand addresses and an optional single character variant. Usually the op-code character would be word-marked, confirming the end of the previous instruction. An item-marked op-code would be handled differently from normal, and this was used in the emulation of IBM 1401 instructions that were not directly compatible. In two-character address mode, the full address defined one character in the 4K block currently addressed by the relevant register. In three-character address mode, the first three bits of an operand address could designate one of six index registers that occupied the first 24 addressable memory locations. The other two possible bit patterns indicated no indexing (000), or indirect addressing (111).
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